1T-SRAM is a pseudo-static random-access memory (PSRAM) technology introduced by MoSys, Inc. in September 1998, which offers a high-density alternative to traditional static random …

Jan 4, 2025 · Calling the "1T SRAM" just "ordinary DRAM but with on-chip refresh" is seriously mistaken. To an ASIC designer (the primary customer for this product) the major problem with …

Sep 9, 2021 · In this study, we fabricated a 2 × 2 one-transistor static random-access memory (1T-SRAM) cell array comprising single-gated feedback field-effect transistors and examined …

Jul 24, 2000 · MoSys 1T-SRAM is pretty cool stuff, even though it isn't technically SRAM...it uses one transistor and one capacitor per cell just like DRAM, but it is arranged logically similar to …

The 1T-SRAM can be made in pure logic processes for higher speed, or with an embedded DRAM process to achieve greater density. Though MoSys (www.mosys.com)calls the design …

In a 0.18-micron process, 1T-SRAMs will operate at up to 400 MHz. Design Hides DRAM-Specific Operations The 1T-SRAM design works just like an SRAM, with no wait states or …

Feb 19, 2016 · The 1T-SRAM used in the GameCube was a Mosys design that improved upon the more conventional PSRAM, or Pseudo-SRAM. PSRAM and 1T-SRAM are really DRAM on …

Jan 24, 2019 · The technology was originally implemented with a buried N-well below the transistor. This wasn’t – and isn’t – part of a standard CMOS flow. Yeah, it’s possible to …

1T-SRAM is an innovation that promises to dramatically change the balance between the two traditional memory technologies. At the very least it will provide DRAM makers with the …

Standard CMOS process: uses horizontal plate cap, defined by poly gate mask. Requires additional non-critical mask step, an additional etch step (to create trench in STI) and an …